The present invention relates to field effect transistors, field emission apparatuses, thin film transistors, and methods of forming field effect transistors.
Field effect transistors are well known in the art. Such transistors are utilized in a variety of applications. One exemplary field effect transistor configuration is the thin film transistor. Thin film transistor configurations have been particularly useful in field emission devices, such as field emission displays.
In typical arrangements, thin film field effect transistors are formed over an insulative substrate, such as glass. A thin film semiconductive layer is formed over the insulative substrate. An exemplary semiconductive layer comprises amorphous silicon. A gate dielectric layer and gate layer are provided over the thin film layer and patterned using photolithography to form a gate. Conductive regions are formed intrinsically using plasma enhanced chemical vapor deposition (PECVD) with appropriate gas precursors to form the thin film field effect transistor construction.
Precise alignment of the gate with the active region of a field effect transistor, including thin film transistor configurations, is desired to ensure proper operation of the device as well as enhance the operational characteristics of the device. There exists a need in the art to provide improved field effect transistor device configurations and methodologies for fabricating such transistor devices for controlling emission.
The present invention provides field effect transistors, field emission apparatuses, thin film transistors, and methods of forming field effect transistors.
According to one aspect of the present invention a field effect transistor includes a semiconductive layer configured to form a channel region. The field effect transistor further includes a pair of spaced conductively doped regions in electrical connection with the channel region of the semiconductive layer and a gate intermediate the semiconductive regions. A gate dielectric layer is provided intermediate the semiconductive layer and the gate, and the gate dielectric layer is configured to align the gate with the channel region of the semiconductive layer.
According to some aspects of the present invention, the conductive regions comprise source/drain regions. One of the source/drain regions may be formed to comprise a field emitter providing a field emission apparatus. The field emission apparatus is configured as an active field device in some configurations.
In one aspect, chemical-mechanical polishing self-aligns the gate with the channel region. According to another aspect, a field emission device includes a transistor configured to control the emission of electrons from an emitter.
Yet another aspect of the present invention provides a method of forming a field effect transistor. The method includes the steps of forming a semiconductive layer having a channel region and forming plural spaced conductively doped regions electrically coupled with the semiconductive layer. This method further provides forming a gate dielectric layer over the semiconductive layer, forming a gate over the gate dielectric layer, and aligning the gate with the channel region using the gate dielectric layer.
Other aspects of the present invention are disclosed herein.